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Micron Technology

Computing and Electronics
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DRAM Design Engineering Intern

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Boise, ID
Format: In-person
Overall rating

4

Culture rating
Work rating

My experience

Overview

Improved compact array model (CAM) for the DRAM and ran various simulations and test patterns to ensure that the model matched with silicon.

Impact of work

Time spent working


Interview advice

Advice on how to prepare

Brush up on basics like digital design, CMOS device physics, etc. Definitely helpful to have background in circuit simulation.


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